module compare_4(
	input wire[3:0] x,y,
	output reg[2:0] data_out,
	input wire enable
);
	always @(x or y or enable) begin
		if (enable == 1) begin
			if (x>y)
				data_out = 3'b001;
			else if (x == y)
				data_out = 3'b010;
			else if(x<y)
				data_out = 3'b100;
		end
	end
endmodule
